Senior level FPGA programmer with a broad engineering skills, innovative spirit, and desire to work in a fast paced, entrepreneurial environment. Candidate should have a background in wireless communication with experience working in the data path of wireless communications systems.
The position includes the filter design and implementation, system performance validation and algorithm optimization
Bachelor's Degree from a 4-year university in Electrical Engineering, Computer Science or related technical field required. Master’s degree a plus. Minimum of ten years related experience.
- Excellent knowledge of Verilog.
- Proficiency with VHDL and System Verilog.
- Proficiency with HDL functional simulator such as ModelSim.
- Excellent communication skills, a strong work ethic and the ability to work both independently or part of a team.
- Experience with Altera FPGA tool flows.
- Knowledge of Platform Designer (Qsys) and NIOS processor is a plus.
- Knowledge of DSP Builder and Simulink is a plus.
- Knowledge of the complete FPGA software development life cycle, from requirements to design, implementation, testing, and release.
- Ability to create and implement test plans using spectrum analyzers and signal generators.
- Design and develop efficient, scalable DSP filter structures that are closely integrated with an embedded processor.
- Ability to effectively communicate via oral, and written communications with senior management and technical staff.
- Familiar with flash memory technology and proficient with Linux device driver.
- Knowledge and experience in adjacent areas — DSP and RF
- C/C++ programming skills
- Experience with software optimization of base stations including Lucent and Ericson
- Familiarity with ISO 9001quality standard requirements for documenting all phases of data acquisition is a plus but not necessary.